The invention relates to a raster positioning circuit such as, for example, a centering circuit for a deflection system of a display.
Deflection systems utilized in television receivers or monitors frequently include circuitry which allows for the adjustment of, for example, the centering of the raster on the face of the kinescope tube. The need for this centering feature is increased as overscan of the kinescope tube is reduced, that is, as the raster width approaches the width of the kinescope tube face. Centering is usually accomplished by causing a direct current of selected polarity and magnitude to flow through the deflection windings.
In some prior art arrangements, a centering circuitry is placed in parallel with the deflection windings to produce an average, or direct current (DC) through the deflection winding during the trace interval. It includes a non-symmetrical conduction network. An integrating inductor is coupled in series combination with the network for producing a magnitude imbalance between a positive portion of the inductor current and a negative portion of the inductor current in a manner to provide for a DC current component. The DC current component provides raster centering. The DC current component is adjustable by a potentiometer that conducts a significant portion of the inductance current.
Because peak values of the inductance current can reach several hundreds of milliamperes, the variable resistor tends to be expensive because it must be large to handle power and heat. It may be desirable to subject the variable resistor to a lower current peak level so that a less expensive part for the variable resistor can be utilized.
In carrying out an inventive feature, a centering circuit includes a Darlington transistor coupled in an anti-parallel arrangement with a single anti-parallel diode. The combination of the Darlington transistor and the single anti-parallel diode in a single case or package is common. The Darlington transistor and anti-parallel diode form a non-linear conduction network that is coupled in series with an inductor. The base voltage of the Darlington transistor is produced in a potentiometer forming a voltage divider. Because of the low base current of the Darlington transistor, the potentiometer conducts smaller current levels than the potentiometer in the prior art. Thereby, advantageously, a less expensive potentiometer can be utilized.
It may be desirable to be able to adjust the DC current component of the inductance current to a low level that may be close to zero. That requires adjusting the potentiometer to produce a collector-to-emitter voltage of the Darlington transistor to a minimum value that is approximately equal to the forward voltage of the single anti-parallel diode.
In carrying out another inventive feature, a resistor is coupled between the collector of the Darlington transistor and an end terminal of the potentiometer that is closer to the collector than to the emitter of the Darlington transistor. Thus, during Darlington transistor conduction, the resistor can provide extra turn on bias voltage and can reduce the collector-to-emitter voltage of the Darlington transistor to a level that is approximately equal to the forward voltage of the single anti-parallel diode.
A deflection apparatus with a raster positioning arrangement, embodying an inventive feature, includes an inductance coupled to the deflection winding for generating an alternating current in the inductance at a frequency related to a frequency of a deflection current. A rectifier is coupled to the inductance for conducting at least a portion of the inductance current, when the inductance current is at a first polarity. A first transistor is coupled to a switching, second transistor in a Darlington configuration. The second transistor is coupled to the inductance for conducting at least a portion of the inductance current, when the inductance current is at an opposite polarity.